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Features
• Zero ppm multiplication error
• Input crystal frequency of 5 - 30 MHz
• Input clock frequency of 4 - 50 MHz
• Output clock frequencies up to 200 MHz
• Peak to Peak Jitter less than 200ps over 200ns interval
(100~200MHz)
• Period jitter less than 100ps(70~200MHz)
• Duty cycle of 45/55% up to 120 MHz at +3.3V and
150MHz at +5V
• 9 selectable frequencies controlled by S0, S1 pins
• Operating voltages of 3.0 to 5.5V
• Tri-state output for board level testing
General
The PT7C4511 is a high performance frequency
multiplier, which integrates Analog Phase Lock Loop
techniques.
The PT7C4511 is the most cost effective way to
generate a high quality, high frequency clock output
from a lower frequency crystal or clock input. It is
designed to replace crystal oscillators in most electronic
systems, clock multiplier and frequency translation.
Using Phase-Locked-Loop (PLL) techniques, the
device uses a standard fundamental mode,
inexpensive crystal to produce output clocks up to
200 MHz.
The complex Logic divider is the ability to generate
nine different popular multiplication factors, allowing
one chip to output many common frequencies.
The device also has an Output Enable pin that tristates
the clock output when the OE pin is taken low.
This product is intended for clock generation and
frequency translation with low output jitter (variation
in the output period)
询价
